Brad Bloechel
Affiliations:- Intel Corporation, Microprocessor Research Laboratories, Hillsboro, OR, USA
According to our database1,
Brad Bloechel
authored at least 14 papers
between 1999 and 2005.
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Bibliography
2005
IEEE J. Solid State Circuits, 2005
A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package.
IEEE J. Solid State Circuits, 2005
IEEE J. Solid State Circuits, 2005
A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
Measurements and analysis of SER-tolerant latch in a 90-nm dual-V<sub>T</sub> CMOS process.
IEEE J. Solid State Circuits, 2004
2003
Dynamic sleep transistor and body bias for active leakage power control of microprocessors.
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
17GHz and 24GHz LNA designs based on extended-S-parameter with microstrip-on-die in 0.18μm logic CMOS technology.
Proceedings of the ESSCIRC 2003, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
IEEE J. Solid State Circuits, 2002
2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
1999
IEEE J. Solid State Circuits, 1999