Bosheng Liu

According to our database, Bosheng Liu authored at least 24 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Share-Aware Joint Model Deployment and Task Offloading for Multi-Task Inference.

Yalan Wu, Jigang Wu, Long Chen, Bosheng Liu, Mianyang Yao, Siew Kei Lam

IEEE Trans. Intell. Transp. Syst., June, 2024

Combining residual structure and edge loss for face image restoration with generative adversarial networks.

Jia Zhao, Bosheng Liu, Runxiu Wu, Longzhe Han, Ming Chen

Signal Image Video Process., April, 2024

BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devices.

Yongqi Xu, Yujian Lee, Gao Yi, Bosheng Liu, Yucong Chen, Peng Liu, Jigang Wu, Xiaoming Chen, Yinhe Han

CoRR, 2024

A Complementary Resistive Switch-Based Balanced Ternary Logic.

Zhijian Peng, Peng Liu, Lian Yao, Zhiqiang You, Bosheng Liu, Yang Yi, Jigang Wu

Proceedings of the IEEE International Test Conference in Asia, 2024

Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAs.

Yi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Quantization-aware Optimization Approach for CNNs Inference on CPUs.

Jiasong Chen, Zeming Xie, Weipeng Liang, Bosheng Liu, Xin Zheng, Jigang Wu, Xiaoming Xiong

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMs.

Bosheng Liu, Zhuoshen Jiang, Yalan Wu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han

IEEE Trans. Parallel Distributed Syst., December, 2023

Two-Level Scheduling Algorithms for Deep Neural Network Inference in Vehicular Networks.

Yalan Wu, Jigang Wu, Mianyang Yao, Bosheng Liu, Long Chen, Siew Kei Lam

IEEE Trans. Intell. Transp. Syst., September, 2023

Accelerating event-based deep neural networks via flexible data encoding.

Yuanli Zhong, Yongqi Xu, Bosheng Liu, Yibing Tang, Jigang Wu

IEICE Electron. Express, 2023

Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach.

Bosheng Liu, Hongyi Liang, Jigang Wu, Xiaoming Chen, Peng Liu, Yinhe Han

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Search-Free Inference Acceleration for Sparse Convolutional Neural Networks.

Bosheng Liu, Xiaoming Chen, Yinhe Han, Jigang Wu, Liang Chang, Peng Liu, Haobo Xu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Fault Modeling and Efficient Testing of Memristor-Based Memory.

Peng Liu, Zhiqiang You, Jigang Wu, Bosheng Liu, Yinhe Han, Krishnendu Chakrabarty

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM.

Bosheng Liu, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han, Peng Liu

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Swallow: A Versatile Accelerator for Sparse Neural Networks.

Bosheng Liu, Xiaoming Chen, Yinhe Han, Haobo Xu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Search-free Accelerator for Sparse Convolutional Neural Networks.

Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Accelerating DNN-based 3D point cloud processing for mobile computing.

Bosheng Liu, Xiaoming Chen, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li

Sci. China Inf. Sci., 2019

ACG-Engine: An Inference Accelerator for Content Generative Neural Networks.

Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Bosheng Liu, Yinhe Han

Proceedings of the International Conference on Computer-Aided Design, 2019

Merging Everything (ME): A Unified FPGA Architecture Based on Logic-in-Memory Techniques.

Xiaoming Chen, Longxiang Yin, Bosheng Liu, Yinhe Han

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators.

Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators.

Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2016

C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelization.

Lili Song, Ying Wang, Yinhe Han, Xin Zhao, Bosheng Liu, Xiaowei Li

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

A signal degradation reduction method for memristor ratioed logic (MRL) gates.

Bosheng Liu, Ying Wang, Zhiqiang You, Yinhe Han, Xiaowei Li

IEICE Electron. Express, 2015

2013

Comparator and half adder design using complementary resistive switches crossbar.

Bosheng Liu, Zhiqiang You, Xiangrao Li, Jishun Kuang, Zheng Qin

IEICE Electron. Express, 2013

2009

PCE algorithm for PAPR reduction in OFDM-ROF system.

Jianping Wang, Bosheng Liu, Xianwei Zhou

IEEE Trans. Consumer Electron., 2009