Boris Polianskikh

According to our database, Boris Polianskikh authored at least 2 papers between 2001 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2002

Design and Implementation of Error Detection and Correction Circuitry for Multilevel Memory Protection.

Boris Polianskikh, Zeljko Zilic

Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002

2001

New embedded memory architecture for enhanced yield, performance and power consumption.

Boris Polianskikh, Zeljko Zilic

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001