Bohyeon Kang

According to our database, Bohyeon Kang authored at least 3 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

FEOL Monolithic Co-Integration of FeFET and CMOS on 8-Inch Wafer Using Laser Spike Annealing With Implementation of an FeFET Inverter.

Bohyeon Kang, Jehyun An, Jongseo Park, Giryun Hong, Beomjoo Ham, Jaeseong Pyo, Sung-Min Ahn, Rock-Hyun Baek

IEEE Access, 2024

2023

Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application.

Jongseo Park, Kyeong-Keun Choi, Jehyun An, Bohyeon Kang, Hyeonseo You, Giryun Hong, Sung-Min Ahn, Rock-Hyun Baek

IEEE Access, 2023

2019

Source/Drain Patterning FinFETs as Solution for Physical Area Scaling Toward 5-nm Node.

Jun-Sik Yoon, Seunghwan Lee, Junjong Lee, Jinsu Jeong, Hyeok Yun, Bohyeon Kang, Rock-Hyun Baek

IEEE Access, 2019