Bogdan Pasca

ACM Trans. Reconfigurable Technol. Syst., September, 2024

FPGA Modular Multipliers using Hybrid Reduction Techniques.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

Efficient 8-bit Matrix Multiplication on Intel Agilex-5 FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

if-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs.

[BibT_eX]

[DOI]

Shahzad Ahmad Butt

Benjamin Reynolds

Veeraraghavan Ramamurthy

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

Multiplier Architecture with a Carry-Based Partial Product Encoding.

[BibT_eX]

[DOI]

Igor Kucherenko

Proceedings of the 31st IEEE Symposium on Computer Arithmetic, 2024

2023

Extracting low-precision floating-point adders from embedded hard FP DSP Blocks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Symposium on Computer Arithmetic, 2023

2022

Stratix 10 NX Architecture.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2022

Guest Editorial: Special Section on Emerging and Impacting Trends on Computer Arithmetic.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

Low-Latency Modular Exponentiation for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021

Efficient Floating-Point Implementation of the Probit Function on FPGAs.

[BibT_eX]

[DOI]

Mioara Joldes

J. Signal Process. Syst., 2021

Dense FPGA Compute Using Signed Byte Tuples.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Efficient FPGA Modular Multiplication Implementation.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Folded Integer Multiplication for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Stratix 10 NX Architecture and Applications.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2019

BFLOAT MLP Training Accelerator for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Extracting INT8 Multipliers from INT18 Multipliers.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

High Precision, High Performance FPGA Adders.

[BibT_eX]

[DOI]

Gregg Baeckler

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Hybrid Dot-Product Design for FP-Enabled FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

2018

Activation Function Architectures for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

High-Performance QR Decomposition for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017

Single Precision Logarithm and Exponential Architectures for Hard Floating-Point Enabled FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Model-based hardware design based on compatible sets of isomorphic subgraphs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2017

Floating Point Tangent Implementation for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

Flexible Fixed-Point Function Generation for FPGAs.

[BibT_eX]

[DOI]

Matei Istoan

Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016

Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016

2015

High-Level Design Tools for Floating Point FPGAs.

[BibT_eX]

[DOI]

Deshanand P. Singh

Tomasz S. Czajkowski

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Floating-Point DSP Block Architecture for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Design and Implementation of an Embedded FPGA Floating Point DSP Block.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Symposium on Computer Arithmetic, 2015

2014

Tools and Techniques for Efficient High-Level System Design on FPGAs.

[BibT_eX]

[DOI]

CoRR, 2014

Low-cost multiplier-based FPU for embedded processing on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013

Floating-Point Exponentiation Units for Reconfigurable Computing.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2013

Efficient floating-point polynomial evaluation on FPGAS.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Faithful single-precision floating-point tangent for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Elementary Function Implementation with Optimized Sub Range Polynomial Evaluation.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012

FPGA-specific synthesis of loop-nests with pipelined computational cores.

[BibT_eX]

[DOI]

Christophe Alias

Alexandru Plesco

Microprocess. Microsystems, 2012

Correctly rounded floating-point division for DSP-enabled FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

High-performance floating-point computing on reconfigurable circuits. (Calcul flottant haute performance sur circuits reconfigurables).

[BibT_eX]

[DOI]

Bogdan Mihai Pasca

PhD thesis, 2011

Designing Custom Arithmetic Data Paths with FloPoCo.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2011

FPGA-Specific Arithmetic Optimizations of Short-Latency Adders.

[BibT_eX]

[DOI]

Hong Diep Nguyen

Thomas B. Preußer

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

An FPGA architecture for solving the Table Maker's Dilemma.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

Automatic Generation of FPGA-Specific Pipelined Accelerators.

[BibT_eX]

[DOI]

Christophe Alias

Alexandru Plesco

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

Multipliers for floating-point double precision and beyond on FPGAs.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2010

Floating-point exponential functions for DSP-enabled FPGAs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2010

Pipelined FPGA Adders.

[BibT_eX]

[DOI]

Hong Diep Nguyen

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Multiplicative Square Root Algorithms for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Automatic generation of polynomial-based hardware architectures for function evaluation.

[BibT_eX]

[DOI]

Mioara Joldes

Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009

Large multipliers with fewer DSP blocks.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Generating high-performance custom floating-point pipelines.

[BibT_eX]

[DOI]

Cristian Klein