Bo Yang
Affiliations:- NVIDIA
- Polytechnic Institute of New York University
According to our database1,
Bo Yang
authored at least 11 papers
between 2003 and 2007.
Collaborative distances:
Collaborative distances:
Timeline
2003
2004
2005
2006
2007
0
1
2
3
4
1
3
2
2
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on linkedin.com
On csauthors.net:
Bibliography
2007
Power Optimization for Universal Hash Function Data Path Using Divide-and-Concatenate Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks.
IEEE Trans. Computers, 2006
IEEE J. Sel. Areas Commun., 2006
2005
Divide-and-concatenate: an architecture-level optimization technique for universal hash functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IACR Cryptol. ePrint Arch., 2005
A constant array multiplier core generator with dynamic partial evaluation architecture selection (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
2004
Microprocess. Microsystems, 2004
IACR Cryptol. ePrint Arch., 2004
Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
2003
IACR Cryptol. ePrint Arch., 2003