Blazej Nowacki

According to our database, Blazej Nowacki authored at least 10 papers between 2010 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A Calibration Scheme for a Sigma-Delta Modulator Using Passive Integrators.

Inês Nogueira De Brito, Nuno Paulino, Blazej Nowacki, Tommy Mullane

Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

2017

A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators.

Blazej Nowacki, Nuno Paulino, João Goes

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM.

Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014

A low power 4^th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling.

Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A simple 1 GHz non-overlapping two-phase clock generators for SC circuits.

Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

2012

Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions.

João L. A. de Melo, Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters.

Edinei Santin, Luís B. Oliveira, Blazej Nowacki, João Goes

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A second-order switched-capacitor ΔΣ modulator using very incomplete settling.

Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS.

Blazej Nowacki, Nuno Paulino, João Goes

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs.

Edinei Santin, Luís B. Oliveira, Blazej Nowacki, João Goes

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010