Björn Debaillie

According to our database1, Björn Debaillie authored at least 39 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Review of Integrated Systems and Components for 6G Wireless Communication in the D-Band.
Proc. IEEE, March, 2023

2021

2020
Design of D-Band Transformer-Based Gain-Boosting Class-AB Power Amplifiers in Silicon Technologies.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020


2019
Design of A D-band Transformer-Based Neutralized Class-AB Power Amplifier in Silicon Technologies.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Systematic Design of On-Chip Matching Networks for D-band Circuits.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

A 112-142GHz Power Amplifier with Regenerative Reactive Feedback achieving 17dBm peak Psat at 13% PAE.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019


2017
Zero Overhead Device Tracking in 60 GHz Wireless Networks using Multi-Lobe Beam Patterns.
Proceedings of the 13th International Conference on emerging Networking EXperiments and Technologies, 2017

2015
A Flexible and Future-Proof Power Model for Cellular Base Stations.
Proceedings of the IEEE 81st Vehicular Technology Conference, 2015

An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power.
Proceedings of the ESSCIRC Conference 2015, 2015

In-band full-duplex transceiver technology for 5G mobile networks.
Proceedings of the ESSCIRC Conference 2015, 2015

Full-duplex transmission in small area radio communication systems.
Proceedings of the 20th IEEE International Workshop on Computer Aided Modelling and Design of Communication Links and Networks, 2015

2014
Analog/RF Solutions Enabling Compact Full-Duplex Radios.
IEEE J. Sel. Areas Commun., 2014

Modeling the hardware power consumption of large scale antenna systems.
Proceedings of the IEEE Online Conference on Green Communications, 2014

RF self-interference cancellation for full-duplex.
Proceedings of the 9th International Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2014

A Full-Duplex Transceiver Prototype with In-System Automated Tuning of the RF Self-Interference Cancellation.
Proceedings of the 1st International Conference on 5G for Ubiquitous Connectivity, 2014

2013
A Digitally Modulated Class-E Polar Amplifier in 90 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
Flexible power modeling of LTE base stations.
Proceedings of the 2012 IEEE Wireless Communications and Networking Conference, 2012

Reduced Complexity On-chip IQ-Imbalance Self-Calibration.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

2011
A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers.
IEEE J. Solid State Circuits, 2011

A multiband LTE SAW-less modulator with -160dBc/Hz RX-band noise in 40nm LP CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Opportunities for energy savings in pico/femto-cell base-stations.
Proceedings of the 2011 Future Network & Mobile Summit, Warsaw, Poland, June 15-17, 2011, 2011

An impedance modulated class-E polar amplifier in 90 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
A 5 mm<sup>2</sup> 40 nm LP CMOS Transceiver for a Software-Defined Radio Platform.
IEEE J. Solid State Circuits, 2010

A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS.
IEEE J. Solid State Circuits, 2010

A 5mm<sup>2</sup> 40nm LP CMOS 0.1-to-3GHz multistandard transceiver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

An area efficient digital amplitude modulator in 90nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

A compact digital amplitude modulator in 90nm CMOS.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Calibration of Direct-Conversion Transceivers.
IEEE J. Sel. Top. Signal Process., 2009

A 2-mm<sup>2</sup> 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS.
IEEE J. Solid State Circuits, 2009

A 2mm<sup>2</sup> 0.1-to-5GHz SDR receiver in 45nm digital CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
Calibration Method Enabling Low-Cost SDR.
Proceedings of IEEE International Conference on Communications, 2008

Calibration of SDR Circuit Imperfections.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

2007
A Fully Reconfigurable Software-Defined Radio Transceiver in 0.13μm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
Ensuring consistency during front-end design using an object-oriented interfacing tool called NETLISP.
Proceedings of the 43rd Design Automation Conference, 2006

Energy-scalable OFDM transmitter design and control.
Proceedings of the 43rd Design Automation Conference, 2006


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