Biswajit Mishra

Orcid: 0000-0002-0675-8045

According to our database1, Biswajit Mishra authored at least 35 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Bilingual Adaptation of Monolingual Foundation Models.
CoRR, 2024

2023
All Digital Minimum Energy Point Detection for Ultra Low Power CMOS Circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

Energy Harvester Powered Fully Digital ECG Front End Acquisition with Integrated TDC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2021
Origins of ECG and Evolution of Automated DSP Techniques: A Review.
IEEE Access, 2021

Exploring Alternatives to Softmax Function.
Proceedings of the 2nd International Conference on Deep Learning Theory and Applications, 2021

2020
IoT-enabled Low Power Environment Monitoring System for prediction of PM2.5.
Pervasive Mob. Comput., 2020

Analytical Equations based Prediction Approach for PM2.5 using Artificial Neural Network.
CoRR, 2020

An optimal scheduling architecture for accelerating batch algorithms on Neural Network processor architectures.
CoRR, 2020

Characterization of a Low Cost, Automated and Field Deployable 2-Lead Myocardial Infarction Detection System.
Proceedings of the 2020 International Conference on COMmunication Systems & NETworkS, 2020

2019
CMOS Power Management Unit Along with Load Regulation Using Switched Capacitor Converters.
J. Low Power Electron., 2019

A Low Power Wearable Device for Real-Time Electrocardiogram Monitoring and Cardiovascular Arrhythmia Detection for Resource Constrained Regions.
J. Low Power Electron., 2019

Ultra-low power digital front-end for single lead ECG acquisition integrated with a time-to-digital converter.
IET Comput. Digit. Tech., 2019

Light-weight configurable architecture for QRS detection.
IET Comput. Digit. Tech., 2019

Ultra Low Power Digital Front-End for Single Lead ECG Acquisition.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

All-Digital CMOS On-Chip Temperature Sensor with Time-Assisted Analytical Model.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

A Reconfigurable Time-to-Digital Converter based on Pulse Stretcher and Gated Delay Line.
Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019

An ECG-PPG Wearable Device for Real Time Detection of Various Arrhythmic Cardiovascular Diseases.
Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019

Approximation and Bit Truncation Techniques in Hardware for Edge Detection.
Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019

Wearable ECG for Real Time Complex P-QRS-T Detection and Classification of Various Arrhythmias.
Proceedings of the 11th International Conference on Communication Systems & Networks, 2019

2018
A 46 nW Power Management Unit with Battery Extender for Solar Energy Harvesters Using 0.18 <i>μ</i>m CMOS.
J. Low Power Electron., 2018

Image Compression Using 2D-Discrete Wavelet Transform on a Light Weight Reconfigurable Hardware.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Fully Digital, Low Energy Capacitive Sensor Interface with an Auto-calibration Unit.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Low Power Management Unit with Load Regulation using DC-DC Switched Capacitor Converters in 0.18μm CMOS.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018

An Iterative Delay Chain based Impedance to Digital Converter using 0.18μm CMOS.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018

A Wearable Device for Real-Time ECG Monitoring and Cardiovascular Arrhythmia Detection for Resource Constrained Regions.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018

2017
A 36 nW Power Management Unit for Solar Energy Harvesters Using 0.18 \upmu m CMOS.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Design of an all-digital, low power time-to-digital converter in 0.18μm CMOS.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017

2016
Design methodology for an Energy Neutral Health Monitoring Wireless Sensor Node.
Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

Designing a Secure Network Interface By Thwarting Mac Spoofing Attacks.
ICTCS, 2016

2015
CORDIC on a configurable serial architecture for biomedical signal processing applications.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2013
A sub-μ<i>a</i> power management circuit in 0.18μ<i>m</i> CMOS for energy harvesters.
Proceedings of the Design, Automation and Test in Europe, 2013

2011
A 120<i>mV</i> startup circuit based on charge pump for energy harvesting circuits.
IEICE Electron. Express, 2011

2009
Variation resilient adaptive controller for subthreshold circuits.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Subthreshold FIR Filter Architecture for Ultra Low Power Applications.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

Advancement in color image processing using Geometric Algebra.
Proceedings of the 2008 16th European Signal Processing Conference, 2008


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