Biswabandan Panda
Orcid: 0000-0002-7381-0632Affiliations:
- Indian Institute of Technology Bombay, Mumbai, India
According to our database1,
Biswabandan Panda
authored at least 47 papers
between 2012 and 2024.
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Bibliography
2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024
2023
CLIP: Load Criticality based Data Prefetching for Bandwidth-constrained Many-core Systems.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the 30th IEEE International Conference on High Performance Computing, 2023
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023
2022
Dataset, April, 2022
Proceedings of the 43rd IEEE Security and Privacy, 2022
Avenger: Punishing the Cross-Core Last-Level Cache Attacker and Not the Victim by Isolating the Attacker.
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022
Proceedings of the 19th IEEE/ACM International Conference on Mining Software Repositories, 2022
Proceedings of the 19th IEEE/ACM International Conference on Mining Software Repositories, 2022
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Address Translation Conscious Caching and Prefetching for High Performance Cache Hierarchy.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
Micro BTB: a high performance and storage efficient last-level branch target buffer for servers.
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
2021
Introducing Fast and Secure Deterministic Stash Free Write Only Oblivious RAMs for Demand Paging in Keystone.
CoRR, 2021
Micro BTB: A High Performance and Lightweight Last-Level Branch Target Buffer for Servers.
CoRR, 2021
IEEE Comput. Archit. Lett., 2021
IEEE Comput. Archit. Lett., 2021
Proceedings of the 21st IEEE International Conference on Software Quality, 2021
Proceedings of the 28th IEEE International Conference on High Performance Computing, 2021
Seclusive Cache Hierarchy for Mitigating Cross-Core Cache and Coherence Directory Attacks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Inferring DNN layer-types through a Hardware Performance Counters based Side Channel Attack.
Proceedings of the AIMLSystems 2021: The First International Conference on AI-ML-Systems, Bangalore India, October 21, 2021
2020
Bouquet of Instruction Pointers: Instruction Pointer Classifier-based Spatial Hardware Prefetching.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2020
STDNeut: Neutralizing Sensor, Telephony System and Device State Information on Emulated Android Environments.
Proceedings of the Cryptology and Network Security - 19th International Conference, 2020
2019
Fooling the Sense of Cross-core Last-level Cache Eviction based Attacker by Prefetching Common Sense.
IACR Cryptol. ePrint Arch., 2019
Proceedings of the 13th USENIX Workshop on Offensive Technologies, 2019
Proceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy, 2019
2018
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018
2017
Band-Pass Prefetching: An Effective Prefetch Management Mechanism Using Prefetch-Fraction Metric in Multi-Core Systems.
ACM Trans. Archit. Code Optim., 2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
2016
IEEE Trans. Computers, 2016
Expert Prefetch Prediction: An Expert Predicting the Usefulness of Hardware Prefetchers.
IEEE Comput. Archit. Lett., 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
2015
ACM Trans. Archit. Code Optim., 2015
2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
XStream: cross-core spatial streaming based MLC prefetchers for parallel applications in CMPs.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014
2013
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013
2012
CSHARP: Coherence and SHaring Aware Cache Replacement Policies for Parallel Applications.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012