Biresh Kumar Joardar
Orcid: 0000-0002-7668-2824
According to our database1,
Biresh Kumar Joardar
authored at least 36 papers
between 2017 and 2024.
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Bibliography
2024
HALO: Communication-Aware Heterogeneous 2.5-D System for Energy-Efficient LLM Execution at Edge.
IEEE J. Emerg. Sel. Topics Circuits Syst., September, 2024
Mitigating Slow-to-Write Errors in Memristor-Mapped Graph Neural Networks Induced by Adversarial Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023
IEEE Trans. Emerg. Top. Comput., 2023
Accelerating Graph Neural Network Training on ReRAM-Based PIM Architectures via Graph and Model Pruning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023
Proceedings of the IEEE International Test Conference, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the IEEE European Test Symposium, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
High-Throughput Training of Deep CNNs on ReRAM-Based Heterogeneous Architectures via Optimized Normalization Layers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Performance and Accuracy Tradeoffs for Training Graph Neural Networks on ReRAM-Based Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2021
HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration.
ACM Trans. Design Autom. Electr. Syst., 2021
ACM Trans. Embed. Comput. Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Heterogeneous Manycore Architectures Enabled by Processing-in-Memory for Deep Learning: From CNNs to GNNs: (ICCAD Special Session Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
DARe: DropLayer-Aware Manycore ReRAM architecture for Training Graph Neural Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
3D++: Unlocking the Next Generation of High-Performance and Energy-Efficient Architectures using M3D Integration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
MOOS: A Multi-Objective Design Space Exploration and Optimization Framework for NoC Enabled Manycore Systems.
ACM Trans. Embed. Comput. Syst., 2019
Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems.
IEEE Trans. Computers, 2019
NoC-enabled software/hardware co-design framework for accelerating <i>k-mer</i> counting.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
REGENT: A Heterogeneous ReRAM/GPU-based Architecture Enabled by NoC for Training CNNs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Design and Optimization of Heterogeneous Manycore Systems Enabled by Emerging Interconnect Technologies: Promises and Challenges.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Taming extreme heterogeneity via machine learning based design of autonomous manycore systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
3D NoC-Enabled Heterogeneous Manycore Architectures for Accelerating CNN Training: Performance and Thermal Trade-offs.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017