Bipul Boro

According to our database, Bipul Boro authored at least 4 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing.

Bipul Boro, Rushik Parmar, Ashvinikumar Dongre, Gaurav Trivedi

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023

ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing.

Ashvinikumar Dongre, Bipul Boro, Gaurav Trivedi

IEEE Trans. Very Large Scale Integr. Syst., December, 2023

Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing.

Bipul Boro, Ashvinikumar Dongre, Rushik Parmar, Gaurav Trivedi

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2020

Approximate radix-8 Booth multiplier for low power and high speed applications.

Bipul Boro, Karri Manikantta Reddy, Nithin Y. B. Kumar, M. H. Vasantha

Microelectron. J., 2020