Bipin Rajendran

Orcid: 0000-0002-2960-6909

According to our database1, Bipin Rajendran authored at least 74 papers between 2002 and 2024.

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Bibliography

2024
Xpikeformer: Hybrid Analog-Digital Hardware Acceleration for Spiking Transformers.
CoRR, 2024

Baseline Drift Tolerant Signal Encoding for ECG Classification with Deep Learning.
CoRR, 2024

Neuromorphic In-Context Learning for Energy-Efficient MIMO Symbol Detection.
Proceedings of the 25th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2024

Hardware-Software Co-optimised Fast and Accurate Deep Reconfigurable Spiking Inference Accelerator Architecture Design Methodology.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

Bayesian Inference Accelerator for Spiking Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Welcome Message from the Chairs.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2024

Stochastic Spiking Attention: Accelerating Attention with Stochastic Computing in Spiking Networks.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
Noise Adaptor in Spiking Neural Networks.
CoRR, 2023

Towards Efficient and Trustworthy AI Through Hardware-Algorithm-Communication Co-Design.
CoRR, 2023

Energy-Efficient On-Board Radio Resource Management for Satellite Communications via Neuromorphic Computing.
CoRR, 2023

Bayesian Inference on Binary Spiking Networks Leveraging Nanoscale Device Stochasticity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Convolutional Spiking Network for Gesture Recognition in Brain-Computer Interfaces.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Spiking Generative Adversarial Networks With a Neural Network Discriminator: Local Training, Bayesian Models, and Continual Meta-Learning.
IEEE Trans. Computers, 2022

2021
Fast On-Device Adaptation for Spiking Neural Networks via Online-Within-Online Meta-Learning.
CoRR, 2021

Hybrid In-Memory Computing Architecture for the Training of Deep Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Training multi-layer spiking neural networks using NormAD based spatio-temporal error backpropagation.
Neurocomputing, 2020

SpinAPS: A High-Performance Spintronic Accelerator for Probabilistic Spiking Neural Networks.
CoRR, 2020

Memristors - from In-memory computing, Deep Learning Acceleration, Spiking Neural Networks, to the Future of Neuromorphic and Bio-inspired Computing.
CoRR, 2020

Mixed-precision deep learning based on computational memory.
CoRR, 2020

Bio-mimetic Synaptic Plasticity and Learning in a sub-500mV Cu/SiO<sub>2</sub>/W Memristor.
CoRR, 2020

Memristors - From In-Memory Computing, Deep Learning Acceleration, and Spiking Neural Networks to the Future of Neuromorphic and Bio-Inspired Computing.
Adv. Intell. Syst., 2020

ESSOP: Efficient and Scalable Stochastic Outer Product Architecture for Deep Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Learning Algorithms and Signal Processing for Brain-Inspired Computing [From the Guest Editors].
IEEE Signal Process. Mag., 2019

Low-Power Neuromorphic Hardware for Signal Processing Applications: A review of architectural and system-level design approaches.
IEEE Signal Process. Mag., 2019

Accurate deep neural network inference using computational phase-change memory.
CoRR, 2019

Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses.
CoRR, 2019

Low-Power Neuromorphic Hardware for Signal Processing Applications.
CoRR, 2019

Computational memory-based inference and training of deep neural networks.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Learning First-to-Spike Policies for Neuromorphic Control Using Policy Gradients.
Proceedings of the 20th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2019

Phase-Change Memory Models for Deep Learning Training and Inference.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Spiking neural networks for handwritten digit recognition - Supervised learning and network optimization.
Neural Networks, 2018

Stochastic learning in deep neural networks based on nanoscale PCMO device characteristics.
Neurocomputing, 2018

Training Multilayer Spiking Neural Networks using NormAD based Spatio-Temporal Error Backpropagation.
CoRR, 2018

Adversarial Training for Probabilistic Spiking Neural Networks.
Proceedings of the 19th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2018

Impact of conductance drift on multi-PCM synaptic architectures.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018

Mixed-precision architecture based on computational memory for training deep neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Live Demonstration: Image Classification Using Bio-inspired Spiking Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Training Probabilistic Spiking Neural Networks with First- To-Spike Decoding.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

Acceleration of Convolutional Networks Using Nanoscale Memristive Devices.
Proceedings of the Engineering Applications of Neural Networks, 2018

2017
Mixed-precision training of deep neural networks using computational memory.
CoRR, 2017

Neuromorphic computing with multi-memristive synapses.
CoRR, 2017

An efficient synaptic architecture for artificial neural networks.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

Spiking neural networks - Algorithms, hardware implementations and applications.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Learning and real-time classification of hand-written digits with spiking neural networks.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

Stochastic deep learning in memristive networks.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2016
Neuromorphic Computing Based on Emerging Memory Technologies.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Efficient and Robust Spiking Neural Circuit for Navigation Inspired by Echolocating Bats.
Proceedings of the Advances in Neural Information Processing Systems 29: Annual Conference on Neural Information Processing Systems 2016, 2016

2015
Tutorial T1: Neuromorphic Computing - Algorithms, Devices and Systems.
Proceedings of the 28th International Conference on VLSI Design, 2015

Delayed Guidance: A Teaching-Learning Strategy to Develop Ill-Structured Problem Solving Skills in Engineering.
Proceedings of the 2015 International Conference on Learning and Teaching in Computing and Engineering, 2015

Live demonstration: Spiking neural circuit based navigation inspired by C. elegans thermotaxis.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Arithmetic computing via rate coding in neural circuits with spike-triggered adaptive synapses.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

C. elegans chemotaxis inspired neuromorphic circuit for contour tracking and obstacle avoidance.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

Composer classification based on temporal coding in adaptive spiking neural networks.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

NormAD - Normalized Approximate Descent based supervised learning rule for spiking neurons.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

Increasing reconfigurability with memristive interconnects.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Reducing read latency of phase change memory via early read and Turbo Read.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Scalable Digital CMOS Architecture for Spike Based Supervised Learning.
Proceedings of the Engineering Applications of Neural Networks, 2015

2014
Sub-threshold CMOS Spiking Neuron Circuit Design for Navigation Inspired by C. elegans Chemotaxis.
CoRR, 2014

A neural circuit for navigation inspired by C. elegans Chemotaxis.
CoRR, 2014

Guided Problem Solving and Group Programming: A Technology-Enhanced Teaching-Learning Strategy for Engineering Problem Solving.
Proceedings of the Sixth IEEE International Conference on Technology for Education, 2014

Analog memristive time dependent learning using discrete nanoscale RRAM devices.
Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

Mimicking the worm - An adaptive spiking neural circuit for contour tracking inspired by C. Elegans thermotaxis.
Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

2013
Nanoscale electronic synapses using phase change devices.
ACM J. Emerg. Technol. Comput. Syst., 2013

Embedded tutorial - Can silicon machines match the efficiency of the human brain?
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Pulsed laser annealing: A scalable and practical technology for monolithic 3D IC.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012
Efficient scrub mechanisms for error-prone emerging memories.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2011
Phase Change Memory: From Devices to Systems
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01735-3, 2011

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Phase Change Memory.
Proc. IEEE, 2010

Coding for sensing in Content Addressable Memories.
Proceedings of the IEEE International Symposium on Information Theory, 2010

2004
Self-consistent power/performance/reliability analysis for copper interconnects.
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004

2002
Timing analysis of tree-like RLC circuits.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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