Binjie Cheng

According to our database1, Binjie Cheng authored at least 24 papers between 2004 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Multivariate Modeling of Variability Supporting Non-Gaussian and Correlated Parameters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Nanowire transistor solutions for 5nm and beyond.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015
Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow.
Proceedings of the 45th European Solid State Device Research Conference, 2015

2014
Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Analytical Models for Three-Dimensional Ion Implantation Profiles in FinFETs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Impact of statistical parameter set selection on the statistical compact model accuracy: BSIM4 and PSP case study.
Microelectron. J., 2013

Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology.
IEEE Des. Test, 2013

SRAM device and cell co-design considerations in a 14nm SOI FinFET technology.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
A framework to study time-dependent variability in circuits at sub-35nm technology nodes.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Analysis of FinFET technology on memories.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011
An analytical mismatch model of nano-CMOS device under impact of intrinsic device variability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

New reliability mechanisms in memory design for sub-22nm technologies.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Statistical aspects of NBTI/PBTI and impact on SRAM yield.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP.
IEEE Des. Test Comput., 2010

Variability resilient low-power 7T-SRAM design for nano-scaled technologies.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Statistical NBTI-effect prediction for ULSI circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Capturing intrinsic parameter fluctuations using the PSP compact model.
Proceedings of the Design, Automation and Test in Europe, 2010

Modeling and simulation of transistor and circuit variability and reliability.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007
The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2005
Probabilistic computing with future deep sub-micrometer devices: a modelling approach.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
The impact of random doping effects on CMOS SRAM cell.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004


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