Bingyi Ye
Orcid: 0000-0002-7671-2800
According to our database1,
Bingyi Ye
authored at least 12 papers
between 2021 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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2022
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2024
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2024
A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS.
IEEE J. Solid State Circuits, January, 2024
A 200-Gb/s PAM-4 Transmitter with 1.6-Vppd Output Swing and Clock Skew Correction in 12-nm FinFET.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS.
IEEE J. Solid State Circuits, 2023
IEEE J. Solid State Circuits, 2023
A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
56 Gb/s PAM4 receiver with an overshoot compensation scheme in 28 nm CMOS technology.
Microelectron. J., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021