Bingjun Xiao

According to our database¹, Bingjun Xiao authored at least 22 papers between 2010 and 2016.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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Article

PhD thesis

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On csauthors.net:

Bibliography

2016

An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures.

[BibT_eX]

[DOI]

CoRR, 2016

Novel applications of deep learning hidden features for adaptive testing.

[BibT_eX]

[DOI]

Bingjun Xiao

Jinjun Xiong

Yiyu Shi

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Customizable Computing

[BibT_eX]

[DOI]

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01748-3, 2015

Communication Optimization for Customizable Domain-Specific Computing.

[BibT_eX]

[DOI]

Bingjun Xiao

PhD thesis, 2015

ARACompiler: a prototyping flow and evaluation framework for accelerator-rich architectures.

[BibT_eX]

[DOI]

Yu-Ting Chen

Jason Cong

Bingjun Xiao

Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

CMOST: a system-level FPGA compilation framework.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

FPGA-RPI: A Novel FPGA Architecture With RRAM-Based Programmable Interconnects.

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

IEEE Trans. Very Large Scale Integr. Syst., 2014

Minimizing Computation in Convolutional Neural Networks.

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2014, 2014

A Fully Pipelined and Dynamically Composable Architecture of CGRA.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Energy-efficient computing using adaptive table lookup based on nonvolatile memories.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Accelerator-rich CMPs: From concept to real hardware.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Optimization of interconnects between accelerators and shared memories in dark silicon.

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Defect recovery in nanodevice-based programmable interconnects (abstract only).

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance.

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Optimizing routability in large-scale mixed-size placement.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only).

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

mrFPGA: A novel FPGA architecture with memristor-based reconfiguration.

[BibT_eX]

[DOI]

Jason Cong

Bingjun Xiao

Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Domain-specific processor with 3D integration for medical image processing.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

2010

A universal state-of-charge algorithm for batteries.

[BibT_eX]

[DOI]

Bingjun Xiao

Yiyu Shi

Lei He

Proceedings of the 47th Design Automation Conference, 2010

Bingjun Xiao

Timeline

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