Bing Wu
Orcid: 0000-0002-5828-8399Affiliations:
- Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan National Laboratory for Optoelectronics, China
According to our database1,
Bing Wu
authored at least 19 papers
between 2017 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
2023
APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023
ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based Accelerators.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
ODLPIM: A Write-Optimized and Long-Lifetime ReRAM-Based Accelerator for Online Deep Learning.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage.
IEEE Trans. Computers, 2021
Towards a probabilistic model for estimation of grounding accidents in fluctuating backwater zone of the Three Gorges Reservoir.
Reliab. Eng. Syst. Saf., 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
2019
ACM Trans. Design Autom. Electr. Syst., 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
2018
CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System.
ACM Trans. Archit. Code Optim., 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
A Novel ReRAM-based Main Memory Structure for Optimizing Access Latency and Reliability.
Proceedings of the 54th Annual Design Automation Conference, 2017