Bin Wu

Orcid: 0000-0003-0065-8905

Affiliations:
  • Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China


According to our database1, Bin Wu authored at least 27 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A CJ-LMS hybrid calibration algorithm in SAR ADC.
IEICE Electron. Express, 2023

2021
Angle Adjustment for Sampling Frequency Offset Estimation of OFDM-Based WLANs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

A Low-Complexity QR Decomposition with Novel Modified RVD for MIMO Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

Design and VLSI Implementation of a Sorted MMSE QR Decomposition for 4×4 MIMO Detectors.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

A 5.67-8.75GHz LC VCO with small gain variation for 2.4GHz-band WLAN applications.
IEICE Electron. Express, 2021

2020
Successive Interference Cancellation-Based Weighted Least-Squares Estimation of Carrier and Sampling Frequency Offsets for WLANs.
IEEE Access, 2020

2019
Improved Weighted Least Square Phase Estimation for OFDM-Based WLANs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Simplified pilot-aided weighted least square phase estimation method for OFDM-based WLANs.
IEICE Electron. Express, 2019

An improved implementation of sum-product algorithm for LDPC decoder.
IEICE Electron. Express, 2019

An Enhanced ARQ Scheme for A-MPDU Transmission Under Error-Prone WLANs.
IEEE Commun. Lett., 2019

2018
FPGA and ASIC implementation of reliable and effective architecture for a LTE downlink transmitter.
IEICE Electron. Express, 2018

An improved implementation of MAX<sup>*</sup> operation for Turbo decoder.
IEICE Electron. Express, 2018

Improved Turbo Decoding With Multivariable Taylor Series Expansion.
IEEE Commun. Lett., 2018

2017
A Memory-Based FFT Processor Design With Generalized Efficient Conflict-Free Address Schemes.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

QoS-Aware A-MPDU Retransmission Scheme for 802.11n/ac/ad WLANS.
IEEE Commun. Lett., 2017

2016
A generalized conflict-free address scheme for arbitrary 2k-point memory-based FFT processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An efficient prime factor memory-based FFT processor for LTE systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2014
An Optimized Low Power Pipeline Analog-to-Digital Converter for High-Speed WLAN Application.
J. Circuits Syst. Comput., 2014

2013
A configurable distributed systolic array for QR decomposition in MIMO-OFDM systems.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
An Area-Efficient 4-Stream FIR Interpolation/Decimation for IEEE 802.11n WLAN.
J. Signal Process. Syst., 2012

Low-Complexity Hardware Interleaver/Deinterleaver for IEEE 802.11a/g/n WLAN.
VLSI Design, 2012

2011
A List Detection and Decoding Algorithm for Linear Block Coded MIMO System.
Proceedings of the 74th IEEE Vehicular Technology Conference, 2011

Outage Probability and SER Analysis of Partial Relay Selection in Amplify-and-Forward MIMO Relay Systems.
Proceedings of the 74th IEEE Vehicular Technology Conference, 2011

A Novel Unequal-Error-Protected STBC Design for Multimedia Transmission.
Proceedings of the 73rd IEEE Vehicular Technology Conference, 2011

Concatenation-assisted symbol-level combining scheme based on LR for MIMO systems with ARQ.
Proceedings of the 6th International ICST Conference on Communications and Networking in China, 2011


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