Bill Stonecypher
According to our database1,
Bill Stonecypher
authored at least 7 papers
between 2003 and 2014.
Collaborative distances:
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Bibliography
2014
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits, 2014
2013
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2011
IEEE J. Solid State Circuits, 2011
2007
A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2003
Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell.
IEEE J. Solid State Circuits, 2003
Proceedings of the Global Telecommunications Conference, 2003