Bilgiday Yuce

Orcid: 0000-0002-7734-8465

According to our database1, Bilgiday Yuce authored at least 22 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
ACTreS: Analog Clock Tree Synthesis.
CoRR, 2021

Methodology of Assessing Information Leakage through Software-Accessible Telemetries.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

2019
A Secure Exception Mode for Fault-Attack-Resistant Processing.
IEEE Trans. Dependable Secur. Comput., 2019

2018
Fault Attacks on Secure Embedded Software: Threats, Design, and Evaluation.
J. Hardw. Syst. Secur., 2018

Fault-assisted side-channel analysis of masked implementations.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Inducing local timing fault through EM injection.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Analyzing the Fault Injection Sensitivity of Secure Embedded Software.
ACM Trans. Embed. Comput. Syst., 2017

Employing dual-complementary flip-flops to detect EMFI attacks.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
Secure authentication with energy-harvesting: A multi-dimensional balancing act.
Sustain. Comput. Informatics Syst., 2016

Lightweight Fault Attack Resistance in Software Using Intra-Instruction Redundancy.
IACR Cryptol. ePrint Arch., 2016

Analyzing the Efficiency of Biased-Fault Based Attacks.
IEEE Embed. Syst. Lett., 2016

A Configurable and Lightweight Timing Monitor for Fault Attack Detection.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

FAME: Fault-attack Aware Microprocessor Extensions for Hardware Fault Detection and Software Fault Response.
Proceedings of the Hardware and Architectural Support for Security and Privacy 2016, 2016

Software Fault Resistance is Futile: Effective Single-Glitch Attacks.
Proceedings of the 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2016

2015
The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures.
ACM Trans. Embed. Comput. Syst., 2015

TVVF: Estimating the vulnerability of hardware cryptosystems against timing violation attacks.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Improving Fault Attacks on Embedded Software Using RISC Pipeline Characterization.
Proceedings of the 2015 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2015

Differential Fault Intensity Analysis on PRESENT and LED Block Ciphers.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015

2014
Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.
IEEE Trans. Computers, 2014

Differential Fault Intensity Analysis.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

2013
Synthesis of clock trees for Sampled-Data Analog IC blocks.
Proceedings of the East-West Design & Test Symposium, 2013

A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers.
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013


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