Bidyut Mahato

Orcid: 0000-0002-9979-823X

According to our database1, Bidyut Mahato authored at least 10 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Bibliography

2023
A new switch-diode cell-based single-phase cascaded multilevel inverter.
Soft Comput., October, 2023

2022
SEPIC converter in discontinuous conduction mode: Small signal modeling and analysis.
Int. J. Circuit Theory Appl., 2022

2020
Implementation of an Optimum Reduced Components Multicell Multilevel Inverter (MC-MLI) for Lower Standing Voltage.
IEEE Trans. Ind. Electron., 2020

A New and Generalized MLI with Overall Lesser Power Electronic Devices.
J. Circuits Syst. Comput., 2020

Reduction of Power Electronic Devices in a Single-Phase Generalized Multilevel Inverter.
J. Circuits Syst. Comput., 2020

2019
Optimum Structure-Based Multi-level Inverter with Doubling Circuit Configuration.
J. Circuits Syst. Comput., 2019

2016
Operation and control of three-phase multilevel inverter with reduced component.
Proceedings of the 2016 3rd International Conference on Recent Advances in Information Technology (RAIT), 2016

Comparative study of asymmetrical configuration of multilevel inverter for different levels.
Proceedings of the 2016 3rd International Conference on Recent Advances in Information Technology (RAIT), 2016

Comprehensive study of various configurations of three-phase Multilevel inverter for different levels.
Proceedings of the 2016 3rd International Conference on Recent Advances in Information Technology (RAIT), 2016

Active power factor correction for rectifier using micro-controller.
Proceedings of the 2016 3rd International Conference on Recent Advances in Information Technology (RAIT), 2016


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