Bich-Yen Nguyen

According to our database1, Bich-Yen Nguyen authored at least 17 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Unveiling the Impact of AC PBTI on Hydrogen Formation in Oxide Semiconductor Transistors.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Fluorine Plasma Treatment-Enabled ITO Transistors: Excellent Reliability and Comprehensive Understanding of Temperature Dependence from 77K to 375K.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F<sup>2</sup> High-Density Integration.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022
Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Smart Cut<sup>™</sup> technology: from Substrate Enginnering to Advanced 3D Integration.
Proceedings of the International Conference on IC Design and Technology, 2022

2019
Low Temperature SmartCutTM enables High Density 3D SoC Applications.
Proceedings of the International Conference on IC Design and Technology, 2019

22FD-SOI Variability Improvement Thanks to SmartCut Thickness Control at Atomic Scale.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Effect of measurement speed (μs-800 ps) on the characterization of reliability behaviors for FDSOI nMOSFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2017
FD-SOI material enabling CMOS technology disruption from 65nm to 12nm and beyond.
Proceedings of the 2017 IEEE International Conference on IC Design and Technology, 2017

Layout engineering to suppress hysteresis of negative capacitance FinFET.
Proceedings of the 2017 IEEE International Conference on IC Design and Technology, 2017

2015
3D monolithic integration: Stacking technology and applications.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2012
Strained silicon on insulator substrates for fully depleted application.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2010
32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

SRAM design in fully-depleted SOI technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

FDSOI: From substrate to devices and circuit applications.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

2005
Physics-based compact modeling for nonclassical CMOS.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005


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