Bibhudutta Satapathy

Orcid: 0000-0002-8299-5181

Affiliations:
  • Indian Institute of Technology, Department of Electrical Engineering, Jodhpur, India


According to our database1, Bibhudutta Satapathy authored at least 6 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Dynamic Offset Reduction Technique to Mitigate the Effect of Threshold Mismatch in Energy Efficient Comparators.
IEEE Access, 2024

2023
An Energy-efficient and High-speed Dynamic Comparator for Low-noise Applications.
Circuits Syst. Signal Process., 2023

A Single Capacitor-Based Offset Reduction Technique for Energy-Efficient Dynamic Comparators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2021
A low kickback noise and low power dynamic comparator.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

CMOS image sensor with adaptive readout scheme for low power applications.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A High Speed, Low Energy Comparator Based on Current Recycling Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


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