Bhavya K. Daya
According to our database1,
Bhavya K. Daya
authored at least 7 papers
between 2012 and 2017.
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Bibliography
2017
Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
IEEE Comput. Archit. Lett., 2016
Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
High-performance and scalable, low-power and intelligent, ordered Mesh on-chip network.
PhD thesis, 2015
2014
SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014
2012
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012