Bhartipudi Sahishnavi

According to our database, Bhartipudi Sahishnavi authored at least 5 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors.

Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas

Microelectron. J., 2024

Design and Optimization of Robust Process Monitors.

Shiva Sharma, Koushik De, Bhartipudi Sahishnavi, Khanh M. Le, Zia Abbas

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection.

Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

A 0.5V, pico-watt, 0.06%/V / 0.03%/V low supply sensitive current/voltage reference without using amplifiers and resistors.

Bhartipudi Sahishnavi, Sampath Kumar, Ashfakh Ali, Arnab Dey, Inhee Lee, Zia Abbas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 2.3nW Gate-Leakage Based Sub-Bandgap Voltage Reference with Line Sensitivity of 0.0066%/V from -40°C to 150°C for Low-Power IoT Systems.

Arnab Dey, Bharadwaj Subramaniam, Ashfakh Ali, Bhartipudi Sahishnavi, Abhishek Pullela, Zia Abbas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023