Bharghava Rajaram

Orcid: 0000-0002-4481-3885

According to our database1, Bharghava Rajaram authored at least 12 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Design and Simulation of an Edge Compute Architecture for IoT-Based Clinical Decision Support System.
IEEE Access, 2024

2020
Semi-autonomous Collaborative Mobile Platform with Pre-diagnostics for Hospitals.
Proceedings of the Digital Human Modeling and Applications in Health, Safety, Ergonomics and Risk Management. Posture, Motion and Health, 2020

2018
Ancient Sandbox Technique: An Experimental Study Using Piezoelectric Sensors.
Proceedings of the Digital Heritage. Progress in Cultural Heritage: Documentation, Preservation, and Protection, 2018

2017
Classifying human-robot interaction using handshake data.
Proceedings of the 2017 IEEE International Conference on Systems, Man, and Cybernetics, 2017

2015
Efficient, scalable, and fair read-modify-writes
PhD thesis, 2015

2013
Fast RMWs for TSO: semantics and implementation.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

2012
SuperCoP: a general, correct, and performance-efficient supervised memory system.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

Efficient sequential consistency via conflict ordering.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2010
Design of Low Power Systems Using Inexact Logic Circuits.
J. Low Power Electron., 2010

Transition Inversion Based Low Power Data Coding Scheme for Buffered Data Transfer.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Inexact Decision Circuits: An Application to Hamming Weight Threshold Voting.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

2009
Transition Inversion Based Low Power Data Coding Scheme for Synchronous Serial Communication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009


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