Bharani Thiruvengadam

According to our database, Bharani Thiruvengadam authored at least 3 papers between 2001 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

A 0.4V∼1V 0.2A/mm² 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS.

Pavan Kumar, Vaibhav A. Vaidya, Harish Krishnamurthy, Stephen T. Kim, George E. Matthew, Sheldon Weng, Bharani Thiruvengadam, Wayne Proefrock, Krishnan Ravichandran, Vivek De

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS.

Harish Krishnamurthy, Vaibhav A. Vaidya, Pavan Kumar, George E. Matthew, Sheldon Weng, Bharani Thiruvengadam, Wayne Proefrock, Krishnan Ravichandran, Vivek De

Proceedings of the Symposium on VLSI Circuits, 2014

2001

Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers.

Andreas Dandalis, Viktor K. Prasanna, Bharani Thiruvengadam

Proceedings of the Field-Programmable Logic and Applications, 2001