Bert Oude-Essink

Orcid: 0009-0008-9124-9800

According to our database1, Bert Oude-Essink authored at least 4 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme.
IEEE J. Solid State Circuits, April, 2024

2023
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2016
A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth.
IEEE J. Solid State Circuits, 2016

15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016


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