Bentian Jiang

Orcid: 0000-0001-8163-3114

According to our database1, Bentian Jiang authored at least 14 papers between 2019 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Parmesan: Efficient Partitioning and Mapping Flow for DNN Training on General Device Topology.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024

Size-Optimized Depth-Constrained Large Parallel Prefix Circuits.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Exploring Rule-Free Layout Decomposition via Deep Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

2022
Neural-ILT 2.0: Migrating ILT to Domain-Specific and Multitask-Enabled Neural Network.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A2-ILT: GPU accelerated ILT with spatial attention mechanism.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Partition and place finite element model on wafer-scale engine.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Building up End-to-end Mask Optimization Framework with Self-training.
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

2020
Neural-ILT: Migrating ILT to Neural Networks for Mask Printability and Complexity Co-optimization.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

CU.POKer: Placing DNNs on Wafer-Scale Al Accelerator with Optimal Kernel Sizing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Dr. CU 2.0: A Scalable Detailed Routing Framework with Correct-by-Construction Design Rule Satisfaction.
Proceedings of the International Conference on Computer-Aided Design, 2019

FIT: Fill Insertion Considering Timing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

A fast machine learning-based mask printability predictor for OPC acceleration.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Detailed routing by sparse grid graph and minimum-area-captured path search.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019


  Loading...