Benoît Tain
Orcid: 0000-0001-8865-4225
According to our database1,
Benoît Tain
authored at least 9 papers
between 2010 and 2023.
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Bibliography
2023
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.
IEEE J. Solid State Circuits, 2023
2022
J. Signal Process. Syst., 2022
2021
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
2020
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020
2018
PNeuro: A scalable energy-efficient programmable hardware accelerator for neural networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2014
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC.
IEEE J. Solid State Circuits, 2014
2013
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC.
Proceedings of the ESSCIRC 2013, 2013
2010
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010