Benjamin Colombeau

According to our database, Benjamin Colombeau authored at least 4 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Material, Process and System Level Analysis for Parasitic Reduction of Next Generation Logic Technology in Conjunction with Backside Power Delivery.

Ashish Pal, Sefa Dag, Pratik B. Vyas, Gregory Costrini, Vinod Reddy, Veeraraghavan Basker, Allen Yeong, Benjamin Colombeau, Bala Haran, Subi Kengeri, El Mehdi Bazizi

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Gate-All-Around SRAM: Performance Investigation and Optimization Towards Vccmin Scaling.

Pratik B. Vyas, Ashish Pal, Gregory Costrini, Benjamin Colombeau, Bala Haran, Subi Kengeri, El Mehdi Bazizi

Proceedings of the IEEE International Memory Workshop, 2024

2023

Contact Cavity Shaping and Selective SiGe: B Low-Temperature Epitaxy Process Solution for sub 10^-9 Ω.cm² Contact Resistivity in Nonplanar FETs.

N. Breil, B.-C. Lee, J. Avila Avendano, J. Jewell, M. Vellaikal, E. Newman, E. M. Bazizi, Ashish Pal, L. Liu, Oleg Gluschenkov, A. Greene, S. Mochizuki, Nicolas Loubet, Benjamin Colombeau, Bala Haran

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2015

Metal gate VT modulation using PLAD N2 implants for Ge p-FinFET applications.

Shraddha Kothari, Chandan Joishi, Dhirendra Vaidya, Hasan Nejad, Benjamin Colombeau, Swaroop Ganguly, Saurabh Lodha

Proceedings of the 45th European Solid State Device Research Conference, 2015