Belle W. Y. Wei

According to our database1, Belle W. Y. Wei authored at least 12 papers between 1988 and 2001.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2001
High-Performance Architectures for Elementary Function Generation.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

1997
High-Performance Hardware for Function Generation.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1995
A parallel decoder of programmable Huffman codes.
IEEE Trans. Circuits Syst. Video Technol., 1995

A complex-number multiplier using radix-4 digits.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995

1994
A VLSI architecture for a real-time code book generator and encoder of a vector quantizer.
IEEE Trans. Very Large Scale Integr. Syst., 1994

A Programmable Parallel Huffman Decoder.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994

Video coding for HDTV systems.
Proceedings of the Eighteenth Annual International Computer Software and Applications Conference, 1994

1993
A Single Chip Lempel-Ziv Data Compressor.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991
High-performance VLSI multiplier with a new redundant binary coding.
J. VLSI Signal Process., 1991

Systolic implementations of a move-to-front text compressor.
SIGARCH Comput. Archit. News, 1991

1990
Area-Time Optimal Adder Design.
IEEE Trans. Computers, 1990

1988
Extensions on performance evaluation techniques for concurrent systems.
Proceedings of the Twelfth International Computer Software and Applications Conference, 1988


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