Behjat Forouzandeh
Affiliations:- University of Tehran, Iran
According to our database1,
Behjat Forouzandeh
authored at least 33 papers
between 2006 and 2024.
Collaborative distances:
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Online presence:
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on ece.ut.ac.ir
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Bibliography
2024
High-performance power spectral/bispectral estimator for biomedical signal processing applications using novel memory-based FFT processor.
Integr., 2024
2023
Image Interpolation Based on 2D-DWT with Novel Regularity-Preserving Algorithm Using RLS Adaptive Filters.
Int. J. Image Graph., September, 2023
J. Real Time Image Process., June, 2023
2022
J. Real Time Image Process., 2022
J. Circuits Syst. Comput., 2022
2020
An O(1) time complexity sorting network for small number of inputs with hardware implementation.
Microprocess. Microsystems, 2020
2019
FPGA implementation of an adaptive window size image impulse noise suppression system.
J. Real Time Image Process., 2019
2017
A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
2016
UAFEA: Unified Analytical Framework for IA/AA-Based Error Analysis of Fixed-Point Polynomial Specifications.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Analysis of stress effects on timing of nano-scaled CMOS digital integrated circuits.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
2015
A 0.8-V supply bulk-driven operational transconductance amplifier and Gm-C filter in 0.18 µm CMOS process.
Int. J. Circuit Theory Appl., 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
2014
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the 2014 East-West Design & Test Symposium, 2014
Proceedings of the 2014 East-West Design & Test Symposium, 2014
2012
Microelectron. J., 2012
High-performance low-leakage regions of nano-scaled CMOS digital gates under variations of threshold voltage and mobility.
J. Zhejiang Univ. Sci. C, 2012
Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalised extreme value distribution.
IET Circuits Devices Syst., 2012
IEICE Electron. Express, 2012
2011
IEICE Electron. Express, 2011
Chip Level Statistical Leakage Power Estimation Using Generalized Extreme Value Distribution.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the Eighth International Conference on Information Technology: New Generations, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
A novel ultra low-energy sub-threshold inverter based on nanoscale Field Effect Diode.
IEICE Electron. Express, 2010
Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET.
IEICE Electron. Express, 2010
Statistical delay modeling of read operation of SRAMs due to channel length variation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Low-power variable gain amplifier with wide UGBW based on nanoscale Field Effect Diode.
IEICE Electron. Express, 2009
Design of a two-capacitor sample & hold circuit using a two-stage OTA with hybrid cascode compensation.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
2007
IEICE Electron. Express, 2007
2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006