Basanth Jagannathan
According to our database1,
Basanth Jagannathan
authored at least 8 papers
between 2002 and 2010.
Collaborative distances:
Collaborative distances:
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Bibliography
2010
Effect of Substrate Contact Shape and Placement on RF Characteristics of 45 nm Low Power CMOS Devices.
IEEE J. Solid State Circuits, 2010
Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
A 150 GHz Amplifier With 8 dB Gain and +6 dBm P<sub>sat</sub> in Digital 65 nm CMOS Using Dummy-Prefilled Microstrip Lines.
IEEE J. Solid State Circuits, 2009
A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2005
Proc. IEEE, 2005
2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2003
IEEE J. Solid State Circuits, 2003
2002
IEEE J. Solid State Circuits, 2002