Barton Sano

According to our database, Barton Sano authored at least 7 papers between 1990 and 2000.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2000

Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions.

Chia-Lin Yang, Barton Sano, Alvin R. Lebeck

IEEE Trans. Computers, 2000

Piranha: a scalable architecture based on single-chip multiprocessing.

Luiz André Barroso, Kourosh Gharachorloo, Robert McNamara, Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith, Robert Stets, Ben Verghese

Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

1998

Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications.

Chia-Lin Yang, Barton Sano, Alvin R. Lebeck

Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998

1996

Design and Analysis of Hardware for High-Performance Prolog.

Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Alvin M. Despain

J. Log. Program., 1996

1995

190-MHz CMOS 4-Kbyte Pipelined Caches.

Apoorv Srivastava, Yong-Seon Koh, Barton Sano, Alvin M. Despain

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1993

The 16-fold way: a microparallel taxonomy.

Barton Sano, Alvin M. Despain

Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993

1990

Fast Prolog with an Extended General Purpose Architecture.

Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Ralph Clarke Haygood, William R. Bush, Alvin M. Despain, Joan M. Pendleton, Tep P. Dobry

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990