Bartomeu Alorda

Proceedings of the Intelligent Environments 2020, 2020

New Approach to Indoor Thermal Climate Control Using Natural Building Envelope and Cross Ventilation Techniques.

[BibT_eX]

[DOI]

Juan Muñoz

Proceedings of the Intelligent Environments 2020, 2020

Selection of SRAM Cells to improve Reliable PUF implementation using Cell Mismatch Metric.

[BibT_eX]

[DOI]

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors.

[BibT_eX]

[DOI]

Daniel Malagón-Periánez

IEEE Trans. Emerg. Top. Comput., 2019

Intelligent Energy Consumption in the Balearic Islands Hotels.

[BibT_eX]

[DOI]

Andreu Moià-Pol

Pere Rullan

Proceedings of the Intelligent Environments 2019, 2019

Overheating Mitigation Strategies Analysis: A Mediterranean Case Study.

[BibT_eX]

[DOI]

Proceedings of the Intelligent Environments 2019, 2019

Weak and Strong SRAM cells analysis in embedded memories for PUF applications.

[BibT_eX]

[DOI]

Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2017

6T CMOS SRAMs reliability monitoring through stability measurements.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Cantilever NEMS relay-based SRAM devices for enhanced reliability.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

Evaluation of SRAM cell write margin metrics for lifetime monitoring of BTI-induced Vth drift.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

2016

An affordable experimental technique for SRAM write margin characterization for nanometer CMOS technologies.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2016

On-line write margin estimator to monitor performance degradation in SRAM cores.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2014

Adaptive static and dynamic noise margin improvement in minimum-sized 6T-SRAM cells.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Energy consumption savings in ZigBee-based WSN adjusting power transmission at application layer.

[BibT_eX]

[DOI]

Miquel A. Ribot

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Word-line power supply selector for stability improvement of embedded SRAMs in high reliability applications.

[BibT_eX]

[DOI]

Guillermo Rodríguez-Navas

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Accurate alpha soft error rate evaluation in SRAM memories.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012

Multi-subject Project Based Learning initiative.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Engineering Education Conference, 2012

Understanding the Role of Transmission Power in Component-Based Architectures for Adaptive WSN.

[BibT_eX]

[DOI]

Miquel A. Ribot

Proceedings of the 36th Annual IEEE Computer Software and Applications Conference Workshops, 2012

2011

8T vs. 6T SRAM cell radiation robustness: A comparative analysis.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Design and evaluation of a microprocessor course combining three cooperative methods: SDLA, PjBL and CnBL.

[BibT_eX]

[DOI]

Kay Suenaga

Pere Pons

Comput. Educ., 2011

Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Critical charge characterization in 6-T SRAMs during read mode.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2007

Charge-based testing BIST for embedded memories.

[BibT_eX]

[DOI]

Ivan de Paúl

IET Comput. Digit. Tech., 2007

2005

A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

2004

A Two-Level Power-Grid Model for Transient Current Testing Evaluation.

[BibT_eX]

[DOI]

Vincent Canals

J. Electron. Test., 2004

A BIST-based Charge Analysis for Embedded Memories.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

2003

CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

2002

Charge Based Transient Current Testing (CBT) for Submicron CMOS SRAMs.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

An Off-Chip Sensor Circuit for On-Line Transient Current Testing.

[BibT_eX]

[DOI]

André Ivanov