Bart Vanthournout

According to our database, Bart Vanthournout authored at least 14 papers between 1997 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

Efficient Implementation of Application-Aware Spinlock Control in MPSoCs.

Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Int. J. Embed. Real Time Commun. Syst., 2013

2012

An Overview of Open SystemC Initiative Standards Development.

Trevor Wieman, Bishnupriya Bhattacharya, Tor E. Jeremiassen, Christian Schröder, Bart Vanthournout

IEEE Des. Test Comput., 2012

Application-aware spinlock control using a hardware scheduler in MPSoC platforms.

Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Proceedings of the 2012 International Symposium on System on Chip, 2012

Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach.

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout

Proceedings of the 2012 Interconnection Network Architecture, 2012

2011

Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis.

Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Bart Vanthournout, Gerd Ascheid, Rainer Leupers

Int. J. Embed. Real Time Commun. Syst., 2011

Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

2010

2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures.

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout

Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach.

Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

The MOSART Mapping Optimization for Multi-Core ARchiTectures.

Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin

Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Optimized communication architecture of MPSoCs with a hardware scheduler: A system view.

Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

2009

Task management in MPSoCs: An ASIP approach.

Jerónimo Castrillón, Diandian Zhang, Torsten Kempf, Bart Vanthournout, Rainer Leupers, Gerd Ascheid

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2005

A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.

Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout

Proceedings of the 2005 Design, 2005

1997

Synthesis of pipelined DSP accelerators with dynamic scheduling.

Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man

IEEE Trans. Very Large Scale Integr. Syst., 1997