Bart Swinnen

According to our database1, Bart Swinnen authored at least 9 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2012
3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

In-line metrology and inspection for process control during 3D stacking of IC's.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot.
Proc. IEEE, 2009

Impact of 3D design choices on manufacturing cost.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV).
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
Detection of failure sites by focused ion beam and nano-probing in the interconnect of three-dimensional stacked circuit structures.
Microelectron. Reliab., 2008

2006
Mechanical reliability of Au and Cu wire bonds to Al, Ni/Au and Ni/Pd/Au capped Cu bond pads.
Microelectron. Reliab., 2006


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