Barry W. Johnson
Orcid: 0000-0003-2849-2126
According to our database1,
Barry W. Johnson
authored at least 34 papers
between 1981 and 2023.
Collaborative distances:
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Bibliography
2023
IEEE Internet Things J., February, 2023
2018
Future Gener. Comput. Syst., 2018
2015
Mission Reliability, Cost and Time for Cold Standby Computing Systems with Periodic Backup.
IEEE Trans. Computers, 2015
2010
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
Application of a fault injection based dependability assessment process to a commercial safety critical nuclear reactor protection system.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
2005
Proceedings of the 29th Annual IEEE / NASA Software Engineering Workshop (SEW-29 2005), 2005
2002
Coverage Estimation Using Statistics of the Extremes for When Testing Reveals No Failures.
IEEE Trans. Computers, 2002
2001
2000
Proceedings of the 5th IEEE International Symposium on High-Assurance Systems Engineering (HASE 2000), 2000
1999
Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999
1998
Using statistics of the extremes for software reliability analysis of safety critical systems.
Proceedings of the Ninth International Symposium on Software Reliability Engineering, 1998
1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE Trans. Computers, 1996
IEEE Des. Test Comput., 1996
1994
1993
IEEE Des. Test Comput., 1993
1992
IEEE Trans. Ind. Electron., 1992
1991
IEEE Trans. Computers, 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
1990
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990
1989
Proceedings of the Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems, 1989
1988
Efficient use of time and hardware redundancy for concurrent error detection in a 32-bit VLSI adder.
IEEE J. Solid State Circuits, February, 1988
Proceedings of the First Annual IEEE Symposium on Computer-Based Medical Systems (CBMS'88), 1988
1986
1984
1981