Barry K. Gilbert
According to our database1,
Barry K. Gilbert
authored at least 52 papers
between 1976 and 2023.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1998, "For development of improved electronic packaging for high performance gallium arsenide integrated circuits.".
Timeline
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Bibliography
2023
Capacitor Optimization in Power Distribution Networks Using Numerical Computation Techniques.
CoRR, 2023
Efficient Circuit-Level Implementation of Knuth-Based Balanced and Nearly-Balanced Codes.
CoRR, 2023
2022
J. Cryptogr. Eng., 2022
2020
Real-Time Quality Assessment of Long-Term ECG Signals Recorded by Wearables in Free-Living Conditions.
IEEE Trans. Biomed. Eng., 2020
2019
1D Convolutional Neural Networks for Estimation of Compensatory Reserve from Blood Pressure Waveforms.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
Data Compression via Low Complexity Delta Transition Lossless Encoding for Remote Physiological and Environmental Monitoring.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
On the Design of a Physiological Signal Feature Extraction and Segmentation Digital Subsystem.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
2017
Clinical accuracy QRS detector with automatic parameter adjustment in an autonomous, real-time physiologic monitor.
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017
Efficient implementation of Stockwell Transform for real-time embedded processing of physiologic signals.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
A comparison of efficient first stage decimation filters for continuous time delta sigma modulators.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016
2015
Block Cipher Speed and Energy Efficiency Records on the MSP430: System Design Trade-Offs for 16-bit Embedded Applications.
IACR Cryptol. ePrint Arch., 2015
A highly parallel AES-GCM core for authenticated encryption of 400 Gb/s network protocols.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Simulated imaging of atherosclerotic & radiofrequency ablation lesions using phase subtraction.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015
2014
Development of a Semi-synthetic Dataset as a Testbed for Big-Data Semantic Analytics.
Proceedings of the 2014 IEEE International Conference on Semantic Computing, 2014
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
Proceedings of the 16th IEEE International Conference on e-Health Networking, 2014
Proceedings of the Workshops of the EDBT/ICDT 2014 Joint Conference (EDBT/ICDT 2014), 2014
2010
A Passive Differential Termination and Signal Sensing Device for High-Speed (40 Gb/s) Test Applications.
IEEE Trans. Instrum. Meas., 2010
2009
A 20 GS/s 5-Bit SiGe BiCMOS Dual-Nyquist Flash ADC With Sampling Capability up to 35 GS/s Featuring Offset Corrected Exclusive-Or Comparators.
IEEE J. Solid State Circuits, 2009
2008
A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm bulk CMOS.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Design of a Compact System Using a MEMS Accelerometer to Measure Body Posture and Ambulation.
Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006
2002
Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002
2001
Emerging multigigahertz digital and mixed-signal integrated circuits targeted for military applications: dependence on advanced electronic packaging to achieve full performance.
Proc. IEEE, 2001
2000
Corrections to "description and evaluation of the fast-net smart pixel-based optical interconnection prototype".
Proc. IEEE, 2000
Description and evaluation of the FAST-Net smart pixel-based optical interconnection prototype.
Proc. IEEE, 2000
1999
Optimization of wide-area ATM and local-Area Ethernet/FDDI network configurations for high-speed telemedicine communications employing NASA's ACTS.
IEEE Netw., 1999
Integration of InAs/AlSb/GaSb Resonant Interband Tunneling Diodes with Heterostructure Field-Effect Transistors for Ultra-High-Speed Digital Circuit Applications.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
1997
12 GHz clocked operation of ultralow power interband resonant tunneling diode pipelined logic gates.
IEEE J. Solid State Circuits, 1997
1989
Application of a 3000-gate GaAs array in the development of a gigahertz digital test system.
IEEE J. Solid State Circuits, August, 1989
Improved algorithmic methods for the prediction of wavefront propagation behavior in multiconductor transmission lines for high frequency digital signal processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
1988
IEEE J. Solid State Circuits, April, 1988
Low-power 2K-cell SDFL gate array and DCFL circuits using GaAs self-aligned E/D MESFETs.
IEEE J. Solid State Circuits, February, 1988
The application of gallium arsenide integrated circuit technology to the design and fabrication of future generation digital signal processors: promises and problems.
Proc. IEEE, 1988
1987
IEEE Micro, 1987
1986
Computer, 1986
1982
1981
A Hierarchical Network of Processors for computed Tomography Computation on Large Data Bases.
Proceedings of the 2nd International Conference on Distributed Computing Systems, 1981
1980
Description and evaluation of a system for high-speed, three-dimensional computed tomography of the body: the dynamic spatial reconstructor.
Proceedings of the American Federation of Information Processing Societies: 1980 National Computer Conference, 1980
1978
1976
IEEE Trans. Computers, 1976
A Programmable Dynamic Memory Allocation System for Input/Output of Digital Data into Standard Computer Memories at 40 Megasamples/s.
IEEE Trans. Computers, 1976