Baris Arslan

According to our database, Baris Arslan authored at least 17 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Test Cost-Test Quality Modeling For Adaptive Test.

Bekir Zahit Demiray, Baris Arslan

Proceedings of the IEEE International Conference on Automation, 2022

2016

Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment.

Baris Arslan, Alex Orailoglu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains.

Baris Arslan, Alex Orailoglu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Small delay defect diagnosis through failure observation ordering.

Baris Arslan

Proceedings of the IEEE International Conference on Automation, 2016

2013

Adaptive Test Cost and Quality Optimization Through An Effective Yet Efficient Delivery of Chip Specific Tests.

Baris Arslan

PhD thesis, 2013

Tracing the best test mix through multi-variate quality tracking.

Baris Arslan, Alex Orailoglu

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Full exploitation of process variation space for continuous delivery of optimal delay test quality.

Baris Arslan, Alex Orailoglu

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Delay test resource allocation and scheduling for multiple frequency domains.

Baris Arslan, Alex Orailoglu

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

2011

Adaptive test optimization through real time learning of test effectiveness.

Baris Arslan, Alex Orailoglu

Proceedings of the Design, Automation and Test in Europe, 2011

Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost.

Baris Arslan, Alex Orailoglu

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

Delay test quality maximization through process-aware selection of test set size.

Baris Arslan, Alex Orailoglu

Proceedings of the 28th International Conference on Computer Design, 2010

2004

Test Cost Reduction Through A Reconfigurable Scan Architecture.

Baris Arslan, Alex Orailoglu

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Extending the Applicability of Parallel-Serial Scan Designs.

Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Design space exploration for aggressive test cost reduction in CircularScan architectures.

Baris Arslan, Alex Orailoglu

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

CircularScan: A Scan Architecture for Test Cost Reduction.

Baris Arslan, Alex Orailoglu

Proceedings of the 2004 Design, 2004

2003

Extracting Precise Diagnosis of Bridging Faults from Stuck-at Fault Information.

Baris Arslan, Alex Orailoglu

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

2002

Fault Dictionary Size Reduction through Test Response Superposition.

Baris Arslan, Alex Orailoglu

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002