Barbara A. Chappell

According to our database1, Barbara A. Chappell authored at least 5 papers between 1988 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
A Constructive Matching Algorithm for Library-Based Domino Technology Mapping.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

1996
Static timing analysis for self resetting circuits.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications.
IBM J. Res. Dev., 1995

1989
A 3.5 ns/77 K and 6.2 ns/300 K 64 K CMOS RAM with ECL interfaces.
IEEE J. Solid State Circuits, August, 1989

1988
Fast CMOS ECL receivers with 100-mV worst-case sensitivity.
IEEE J. Solid State Circuits, February, 1988


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