Bang W. Lee

According to our database, Bang W. Lee authored at least 8 papers between 1988 and 1993.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1993

Paralleled hardware annealing for optimal solutions on electronic neural networks.

Bang W. Lee, Bing J. Sheu

IEEE Trans. Neural Networks, 1993

Compact and Fast Multiplier Using Dual Array Tree Structure.

Min C. Park, Bang W. Lee, Gwang Moon Kim, Dong H. Kim

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

200 Mega Pixel Rate IDCT Processor for HDTVC Applications.

Chan S. Kim, Sang W. Song, Man Y. Kim, Young T. Han, Sang A. Kang, Bang W. Lee

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991

Modified Hopfield neural networks for retrieving the optimal solution.

Bang W. Lee, Bing J. Sheu

IEEE Trans. Neural Networks, 1991

1990

VLSI image processor using analog programmable synapses and neurons.

Bang W. Lee, Ji-Chien Lee, Bing J. Sheu

Proceedings of the IJCNN 1990, 1990

1989

Design of a neural-based A/D converter using modified Hopfield network.

Bang W. Lee, Bing J. Sheu

IEEE J. Solid State Circuits, August, 1989

An integrated-circuit reliability simulator-RELY.

Bing J. Sheu, Wen-Jay Hsu, Bang W. Lee

IEEE J. Solid State Circuits, April, 1989

1988

An investigation on local minima of a Hopfield network for optimization circuits.

Bang W. Lee, Bing J. Sheu

Proceedings of International Conference on Neural Networks (ICNN'88), 1988