Bang-Sup Song
Affiliations:- University of California, San Diego, USA
According to our database1,
Bang-Sup Song
authored at least 51 papers
between 1988 and 2014.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1999, "For contributions to integrated filters and analog-digital converters.".
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2014
IEEE J. Solid State Circuits, 2014
2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2010
LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time Delta Sigma Modulators.
IEEE J. Solid State Circuits, 2010
2009
IEEE J. Solid State Circuits, 2009
A Fifth-Order G<sub>m</sub>-C Continuous-Time ΔΣ Modulator With Process-Insensitive Input Linear Range.
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering.
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
IEEE J. Solid State Circuits, 2007
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
IEEE J. Solid State Circuits, 2006
A 1.8-GHz Spur-Cancelled Fractional-N Frequency Synthesizer With LMS-Based DAC Gain Calibration.
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
A 1.8GHz Spur-Cancelled Fractional-N Frequency Synthesizer with LMS-Based DAC Gain Calibration.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2005
IEEE J. Solid State Circuits, 2005
2004
IEEE J. Solid State Circuits, 2004
IEEE J. Solid State Circuits, 2004
2003
Correction to "A carry-free 54 b x 54 b multiplier using equivalent bit conversion algorithm".
IEEE J. Solid State Circuits, 2003
IEEE J. Solid State Circuits, 2003
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm".
IEEE J. Solid State Circuits, 2003
2002
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
2001
IEEE J. Solid State Circuits, 2001
2000
IEEE J. Solid State Circuits, 2000
A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order ΔΣ modulator.
IEEE J. Solid State Circuits, 2000
IEEE J. Solid State Circuits, 2000
1999
IEEE J. Solid State Circuits, 1999
1998
IEEE J. Solid State Circuits, 1998
1997
IEEE J. Solid State Circuits, 1997
1995
IEEE J. Solid State Circuits, December, 1995
A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converter.
IEEE J. Solid State Circuits, April, 1995
1993
IEEE J. Solid State Circuits, December, 1993
Low-distortion Continuous-time R-MOSFET-C Filters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Simplified Digital Calibration for Multi-stage Analog-to-digital Converters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
IEEE J. Solid State Circuits, December, 1992
1990
IEEE J. Solid State Circuits, December, 1990
1989
IEEE J. Solid State Circuits, April, 1989
1988
IEEE J. Solid State Circuits, December, 1988