Baldomir Zajc

According to our database, Baldomir Zajc authored at least 9 papers between 1994 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Logic emulators in digital systems education.

Andrej Trost, Baldomir Zajc

Proceedings of EUROCON 2011, 2011

2005

Test generation for technology-specific multi-faults based on detectable perturbations.

Andrej Zemva, Baldomir Zajc

Microelectron. Reliab., 2005

2001

Optimization of FPGA configurations using parallel genetic algorithm.

Hubert Fröhlich, Andrej Koir, Baldomir Zajc

Inf. Sci., 2001

2000

Educational Programmable Hardware Prototyping and Verification System.

Andrej Trost, Andrej Zemva, Baldomir Zajc

Proceedings of the Field-Programmable Logic and Applications, 2000

1998

Programmabel Prototyping System for Image Processing.

Andrej Trost, Andrej Zemva, Baldomir Zajc

Proceedings of the Field-Programmable Logic and Applications, 1998

1996

An Experimental Programmable Environment for Prototyping Digital Circuits.

Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc

Proceedings of the Field-Programmable Logic, 1996

1994

A Functionality Fault Model: Feasibility and Applications.

Andrej Zemva, Franc Brglez, Krzysztof Kozminski, Baldomir Zajc

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.

Roman Kuznar, Baldomir Zajc, Franc Brglez

Proceedings of the Proceedings EURO-DAC'94, 1994

Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect.

Roman Kuznar, Franc Brglez, Baldomir Zajc

Proceedings of the 31st Conference on Design Automation, 1994