Bal Chand Nagar

According to our database, Bal Chand Nagar authored at least 5 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications.

Lalit Bandil, Bal Chand Nagar

IEEE Trans. Computers, December, 2024

Impact of Variability on Novel Transistor Configurations in Adder Circuits at 7nm FinFET Technology.

Umayia Mushtaq, Md. Waseem Akram, Dinesh Prasad, Aminul Islam, Bal Chand Nagar

J. Circuits Syst. Comput., September, 2024

Modified restoring array-based power efficient approximate square root circuit and its application.

Lalit Bandil, Bal Chand Nagar

Integr., January, 2024

Design and Analysis of an Electronically Tunable VDTA-Based Quadrature Oscillator.

Shekhar Suman Borah, Mourina Ghosh, Bal Chand Nagar, Prabha Sundaravadivel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2016

Comb Filter for Elimination of Unwanted Power Line Interference in Biomedical Signal.

Rajeev K. Ranjan, Chandan Kr. Choubey, Bal Chand Nagar, Sajal K. Paul

J. Circuits Syst. Comput., 2016