Bajaj Ronak

Orcid: 0000-0002-8964-2944

According to our database1, Bajaj Ronak authored at least 10 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Accelerating Hash Computations Through Efficient Instruction-Set Customisation.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017
Exploiting DSP block capabilities in FPGA high level design flows
PhD thesis, 2017

Multipumping Flexible DSP Blocks for Resource Reduction on Xilinx FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016
Mapping for Maximum Performance on FPGA DSP Blocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Improved resource sharing for FPGA DSP blocks.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Initiation Interval Aware Resource Sharing for FPGA DSP Blocks.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015
Minimizing DSP block usage through multi-pumping.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014
Efficient mapping of mathematical expressions into DSP blocks.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Experiments in Mapping Expressions to DSP Blocks.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2012
Evaluating the efficiency of DSP Block synthesis inference from flow graphs.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012


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