Bai Na

According to our database1, Bai Na authored at least 3 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Built-in self test design of power switch with clock-gated charge/discharge transistor.
IET Comput. Digit. Tech., 2014

2012
An Efficient and Flexible Embedded Memory IP Compiler.
Proceedings of the 2012 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2012

2010
A differential read subthreshold SRAM bitcell with self-adaptive leakage cut off scheme.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010


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