Babak Falsafi

James C. Hoe

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Simulation sampling with live-points.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006

Spatial Memory Streaming.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

Log-based architectures for general-purpose monitoring of deployed code.

[BibT_eX]

[DOI]

Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, 2006

2005

A Case for Asymmetric-Cell Cache Memories.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2005

TRUSS: A Reliable, Scalable Server Architecture.

[BibT_eX]

[DOI]

Vasileios Liaskovitis

IEEE Micro, 2005

Evaluating scheduling policies for fine-grain communication protocols on a cluster of SMPs.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2005

TurboSMARTS: accurate microarchitecture simulation sampling in minutes.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Measurements and Modeling of Computer Systems, 2005

Temporal Streaming of Shared Memory.

[BibT_eX]

[DOI]

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

RECAST: Boosting Tag Line Buffer Coverage in Low-Power High-Level Caches "for Free".

[BibT_eX]

[DOI]

Won-Ho Park

Andreas Moshovos

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Accelerating Database Operations Using a Network Processor.

[BibT_eX]

[DOI]

Proceedings of the Workshop on Data Management on New Hardware, 2005

Architecture-Conscious Databases: sub-optimization or the next big leap?

[BibT_eX]

[DOI]

Proceedings of the Workshop on Data Management on New Hardware, 2005

DBmbench: fast and accurate database workload representation on modern microarchitecture.

[BibT_eX]

[DOI]

Minglong Shao

Anastassia Ailamaki

Proceedings of the 2005 conference of the Centre for Advanced Studies on Collaborative Research, 2005

Store-Ordered Streaming of Shared Memory.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

2004

SimFlex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture.

[BibT_eX]

[DOI]

SIGMETRICS Perform. Evaluation Rev., 2004

Fingerprinting: Bounding Soft-Error-Detection Latency and Bandwidth.

[BibT_eX]

[DOI]

IEEE Micro, 2004

Memory coherence activity prediction in commercial workloads.

[BibT_eX]

[DOI]

Proceedings of the 3rd Workshop on Memory Performance Issues, 2004

Efficient Resource Sharing in Concurrent Error Detecting Superscalar Microarchitectures.

[BibT_eX]

[DOI]

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Accurate and Complexity-Effective Spatial Pattern Prediction.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004

2003

Speculative Sequential Consistency with Little Custom Storage.

[BibT_eX]

[DOI]

Chris Gniady

J. Instr. Level Parallelism, 2003

Near-Optimal Precharging in High-Performance Nanoscale CMOS Caches.

[BibT_eX]

[DOI]

Se-Hyun Yang

Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling.

[BibT_eX]

[DOI]

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

Iimplicitly-Multithreaded Processors.

[BibT_eX]

[DOI]

Il Park

T. N. Vijaykumar

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002

Optimizing Traffic in DSM Clusters: Fine-Grain Memory Caching versus Page Migration/Replication.

[BibT_eX]

[DOI]

Theory Comput. Syst., 2002

Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

2001

Reducing leakage in a high-performance deep-submicron instruction cache.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Reference idempotency analysis: a framework for optimizing speculative execution.

[BibT_eX]

[DOI]

Proceedings of the 2001 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP'01), 2001

Dual use of superscalar datapath for transient-fault detection and recovery.

[BibT_eX]

[DOI]

Joydeep Ray

James C. Hoe

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Reducing set-associative cache energy via way-prediction and selective direct-mapping.

[BibT_eX]

[DOI]

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Dead-block prediction & dead-block correlating prefetchers.

[BibT_eX]

[DOI]

Cem Fide

Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor.

[BibT_eX]

[DOI]

Proceedings of the 15th international conference on Supercomputing, 2001

An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

2000

Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator.

[BibT_eX]

[DOI]

Shubhendu S. Mukherjee

IEEE Concurr., 2000

Comparing the effectiveness of fine-grain memory caching against page migration/replication in reducing traffic in DSM clusters.

[BibT_eX]

[DOI]

Proceedings of the Twelfth annual ACM Symposium on Parallel Algorithms and Architectures, 2000

Gated-V<sub>dd</sub>: a circuit technique to reduce leakage in deep-submicron cache memories

[BibT_eX]

[DOI]

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Selective, accurate, and timely self-invalidation using last-touch prediction.

[BibT_eX]

[DOI]

Ilanthiraiyan Pragaspathy

Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

Address Partitioning in DSM Clusters with Parallel Coherence Controllers.

[BibT_eX]

[DOI]

Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000

1999

Memory Sharing Predictor: The Key to a Speculative Coherent DSM.

[BibT_eX]

[DOI]

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Is SC + ILP=RC?

[BibT_eX]

[DOI]

Chris Gniady

T. N. Vijaykumar

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Parallel Dispatch Queue: A Queue-Based Programming Abstraction to Parallelize Fine-Grain Communication Protocols.

[BibT_eX]

[DOI]

Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998

Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory.

[BibT_eX]

[DOI]

Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997

Modeling Cost/Performance of a Parallel Computer Simulator.

[BibT_eX]

[DOI]

ACM Trans. Model. Comput. Simul., 1997

Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Computer Architecture, 1997

Scheduling Communication on a SMP Node Parallel Machine.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1996

Coherent Network Interfaces for Fine-Grain Communication.

[BibT_eX]

[DOI]

Shubhendu S. Mukherjee

Mark D. Hill

Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1994

Application-specific protocols for user-level shared memory.

[BibT_eX]

[DOI]

Proceedings of the Proceedings Supercomputing '94, 1994

Cost/performance of a parallel computer simulator.

[BibT_eX]

[DOI]

Proceedings of the Eighth Workshop on Parallel and Distributed Simulation, 1994

Fine-grain Access Control for Distributed Shared Memory.

[BibT_eX]

[DOI]

Proceedings of the ASPLOS-VI Proceedings, 1994

1993

Kernel Support for the Wisconsin Wind Tunnel.

[BibT_eX]

[DOI]

Steven K. Reinhardt