B. Vandana

According to our database, B. Vandana authored at least 3 papers in 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Prospects of 2D Junctionless Channel Transistor (JLCT) Towards Analog and RF Metrics Using Si and SiGe in Device Layer.

B. Vandana, S. K. Mohapatra, Jitendra Kumar Das, B. S. Patro

J. Low Power Electron., 2017

Effectiveness of High Permittivity Spacer for Underlap Regions of Wavy-Junctionless FinFET at 22 nm Node and Scaling Short Channel Effects.

B. Vandana, Jitendra Kumar Das, S. K. Mohapatra, Brajesh Kumar Kaushik

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Memory Efficient Fractal-SPIHT Based Hybrid Image Encoder.

Mamata Panigrahy, Nirmal Chandra Behera, B. Vandana, Indrajit Chakrabarti, Anindya Sundar Dhar

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017